Instruction Sets of 8085 microprocessor

8085 Instruction Summary by Functional Groups - BragitOff.com

 


1.    Data Transfer Group Instructions

a)    MOV (Move): This instruction copies the contents of the source register or memory location to the destination register or memory location. For example, MOV A, B copies the contents of register B to register A.

b)   MVI (Move Immediate): This instruction loads an 8-bit immediate value into a register or memory location. For example, MVI A, 08H loads 08H into register A.

c)    LDA (Load Accumulator Direct): This instruction loads the contents of a memory location directly into the accumulator. For example, LDA 2000H loads the contents of memory location 2000H into the accumulator.

d)   STA (Store Accumulator Direct): This instruction stores the contents of the accumulator directly into a memory location. For example, STA 3000H stores the contents of the accumulator into memory location 3000H.

e)    LHLD (Load H-L Pair Direct): This instruction loads the contents of two consecutive memory locations directly into the H-L register pair. For example, LHLD 4000H loads the contents of memory locations 4000H and 4001H into the H-L register pair.

f)    SHLD (Store H-L Pair Direct): This instruction stores the contents of the H-L register pair directly into two consecutive memory locations. For example, SHLD 5000H stores the contents of the H-L register pair into memory locations 5000H and 5001H.

g)   STAX (Store Accumulator Indirect): This instruction stores the contents of the accumulator directly into a memory location specified by the contents of the B-C or D-E register pair. For example, STAX B stores the contents of the accumulator into the memory location specified by the contents of the B-C register pair.

h)   LDAX (Load Accumulator Indirect): This instruction loads the contents of a memory location specified by the contents of the B-C or D-E register pair directly into the accumulator. For example, LDAX D loads the contents of the memory location specified by the contents of the D-E register pair into the accumulator.

i)     XCHG (Exchange): This instruction exchanges the contents of the H-L register pair with the contents of the D-E register pair.

 

2.    Arithmetic Group Instructions

 

a)    ADD (Add): The ADD instruction adds the contents of the specified register or memory location to the contents of the accumulator and stores the result in the accumulator. The instruction does not affect any flags. If the result of the addition exceeds 8-bits, the carry flag is set.

 

b)   ADI (Add Immediate): The ADI instruction adds an 8-bit immediate value to the contents of the accumulator and stores the result in the accumulator. The instruction does not affect any flags. If the result of the addition exceeds 8-bits, the carry flag is set.

 

c)    ADC (Add with Carry): The ADC instruction adds the contents of the specified register or memory location, along with the contents of the carry flag, to the contents of the accumulator and stores the result in the accumulator. The instruction sets or clears the carry flag depending on whether there is a carry generated from the addition.

 

d)   ACI (Add Immediate with Carry): The ACI instruction adds an 8-bit immediate value, along with the contents of the carry flag, to the contents of the accumulator and stores the result in the accumulator. The instruction sets or clears the carry flag depending on whether there is a carry generated from the addition.

 

e)    SUB (Subtract): The SUB instruction subtracts the contents of the specified register or memory location from the contents of the accumulator and stores the result in the accumulator. The instruction sets or clears the carry flag depending on whether there is a borrow generated from the subtraction.

 

f)     SUI (Subtract Immediate): The SUI instruction subtracts an 8-bit immediate value from the contents of the accumulator and stores the result in the accumulator. The instruction sets or clears the carry flag depending on whether there is a borrow generated from the subtraction.

 

g)    SBB (Subtract with Borrow): The SBB instruction subtracts the contents of the specified register or memory location, along with the contents of the carry flag, from the contents of the accumulator and stores the result in the accumulator. The instruction sets or clears the carry flag depending on whether there is a borrow generated from the subtraction.

 

h)   SBI (Subtract Immediate with Borrow): The SBI instruction subtracts an 8-bit immediate value, along with the contents of the carry flag, from the contents of the accumulator and stores the result in the accumulator. The instruction sets or clears the carry flag depending on whether there is a borrow generated from the subtraction.

 

i)      INR (Increment): The INR instruction increments the contents of the specified register or memory location by one. The instruction sets or clears the zero flag depending on whether the result of the increment is zero.

 

j)     DCR (Decrement): The DCR instruction decrements the contents of the specified register or memory location by one. The instruction sets or clears the zero flag depending on whether the result of the decrement is zero.

 

k)    INX (Increment Register Pair): The INX instruction increments the contents of the specified register pair by one. For example, if we execute the instruction INX B, the contents of register pair BC will be incremented by one.

 

l)      DCX (Decrement Register Pair): The DCX instruction decrements the contents of the specified register pair by one. For example, if we execute the instruction DCX B, the contents of register pair BC will be decremented by one.

 

m)  DAD (Double Add): The DAD instruction in 8085 programming adds the contents of two 16-bit register pairs and stores the result in the HL register pair. For example, executing DAD B adds the contents of BC to HL. If HL contains 1234H and BC contains 5678H, after execution, HL will contain 68ACH. If the result of the addition exceeds 16 bits, the carry flag is set. DAD does not affect any other register pair or the contents of the accumulator.

 

3.    Logical Group Instructions

 

a)    ANA (Logical AND): The ANA instruction in 8085 programming performs a logical AND operation between the contents of the accumulator and the contents of a register or memory location, and stores the result in the accumulator. For example, executing ANA B performs the operation A = A & B. If the contents of the accumulator are A = 10101010B and the contents of B register are 11001100B, after execution, the accumulator will contain 10001000B.

 

b)   ANI (Logical AND Immediate): The ANI instruction performs a logical AND operation between the contents of the accumulator and an immediate 8-bit data, and stores the result in the accumulator. For example, executing ANI 11001100B performs the operation A = A & 11001100B. If the contents of the accumulator are A = 10101010B, after execution, the accumulator will contain 10001000B.

 

c)    ORA (Logical OR): The ORA instruction performs a logical OR operation between the contents of the accumulator and the contents of a register or memory location, and stores the result in the accumulator. For example, executing ORA B performs the operation A = A | B. If the contents of the accumulator are A = 10101010B and the contents of B register are 11001100B, after execution, the accumulator will contain 11101110B.

 

d)   ORI (Logical OR Immediate): The ORI instruction performs a logical OR operation between the contents of the accumulator and an immediate 8-bit data, and stores the result in the accumulator. For example, executing ORI 11001100B performs the operation A = A | 11001100B. If the contents of the accumulator are A = 10101010B, after execution, the accumulator will contain 11101110B.

 

e)    XRA (Logical XOR): The XRA instruction performs a logical XOR operation between the contents of the accumulator and the contents of a register or memory location, and stores the result in the accumulator. For example, executing XRA B performs the operation A = A ^ B. If the contents of the accumulator are A = 10101010B and the contents of B register are 11001100B, after execution, the accumulator will contain 01100110B.

 

f)     XRI (Logical XOR Immediate): The XRI instruction performs a logical XOR operation between the contents of the accumulator and an immediate 8-bit data, and stores the result in the accumulator. For example, executing XRI 11001100B performs the operation A = A ^ 11001100B. If the contents of the accumulator are A = 10101010B, after execution, the accumulator will contain 01100110B.

 

g)    CMP (Compare): The CMP instruction in 8085 programming subtracts the contents of a register or memory location from the contents of the accumulator, and sets the flags accordingly, without changing the contents of the accumulator. For example, executing CMP B performs the operation A - B, and sets the flags based on the result of the subtraction.

 

h)   CPI (Compare Immediate): The CPI instruction subtracts an immediate 8-bit data from the contents of the accumulator, and sets the flags accordingly, without changing the contents of the accumulator. For example, executing CPI 11001100B performs the operation A - 11001100B, and sets the flags based on the result of the subtraction.

 

i)      CMA (Complement Accumulator): The CMA instruction inverts all the bits of the contents of the accumulator. For example, if the contents of the accumulator are A = 10101010B, after execution of CMA, the contents of the accumulator will be A = 01010101B.

 

j)     STC (Set Carry): The STC is an instruction in 8085 programming that sets the carry flag to 1. It is commonly used with the ADC instruction to perform multi-byte addition. For example, STC followed by ADC A, B adds the contents of A and B along with the carry.

 

k)    CMC (Complement Carry): The CMC is an instruction in 8085 programming that complements the carry flag. It is commonly used with the SUB instruction to perform borrow operations. For example, CMC followed by SUB A, B subtracts the contents of B from A along with the borrow.

 

4.    Branching Group Instructions

 

a)    JMP (Jump): JMP instruction is an unconditional branching instruction that transfers control to the memory location specified in the operand.

 

b)   JC (Jump if Carry): JC and JNC (Jump if No Carry) instructions test the carry flag (CY) and transfer control to the specified memory location if the flag is set or not set, respectively.

 

c)    JZ (Jump if Zero): JZ and JNZ (Jump if Not Zero) instructions test the zero flag (Z) and transfer control to the specified memory location if the flag is set or not set, respectively.

 

d)   JP (Jump if Positive) and JM (Jump if Negative) instructions test the sign flag (S) and transfer control to the specified memory location if the flag is not set or set, respectively.

 

e)   JPE (Jump if Parity Even) and JPO (Jump if Parity Odd) instructions test the parity flag (P) and transfer control to the specified memory location if the flag is set or not set, respectively.

 

f)     CALL (Call) instruction transfers control to the specified memory location after storing the return address on the stack.

g)    CC (Call if Carry), CNC (Call if No Carry), CZ (Call if Zero), CNZ (Call if Not Zero), CP (Call if Positive), CM (Call if Negative), CPE (Call if Parity Even), and CPO (Call if Parity Odd) instructions test the corresponding flag before calling the specified subroutine.

 

h)   RET (Return) instruction transfers control to the calling program after retrieving the return address from the stack.

 

i)     RC (Return if Carry), RNC (Return if No Carry), RZ (Return if Zero), RNZ (Return if Not Zero), RP (Return if Positive), RM (Return if Negative), RPE (Return if Parity Even), and RPO (Return if Parity Odd) instructions test the corresponding flag before returning from the subroutine.

 

j)     RNC: RNC stands for "Return on No Carry" and is a conditional branching instruction in assembly language that allows program flow to be controlled based on the carry flag. If the carry flag is not set, the program will return to the instruction following the CALL or JUMP instruction. For example, if a subtraction operation results in a borrow, the carry flag is set and RNC can be used to jump to a different part of the program.

 

k)    RZ: RZ stands for "Return on Zero" and is a conditional branching instruction that allows program flow to be controlled based on the zero flag. If the zero flag is set, the program will return to the instruction following the CALL or JUMP instruction. For example, RZ can be used to check if the result of an arithmetic operation is zero and to branch to a specific label if it is.

 

l)     RNZ: RNZ stands for "Return on Non-Zero" and is a conditional branching instruction that allows program flow to be controlled based on the zero flag. If the zero flag is not set, the program will return to the instruction following the CALL or JUMP instruction. For example, RNZ can be used to check if the result of an arithmetic operation is non-zero and to branch to a specific label if it is.

 

m) RP: RP stands for "Return on Positive" and is a conditional branching instruction that allows program flow to be controlled based on the sign flag. If the sign flag is not set, the program will return to the instruction following the CALL or JUMP instruction. For example, RP can be used to check if the result of an arithmetic operation is positive and to branch to a specific label if it is.

 

n)   RM: RM stands for "Return on Minus" and is a conditional branching instruction that allows program flow to be controlled based on the sign flag. If the sign flag is set, the program will return to the instruction following the CALL or JUMP instruction. For example, RM can be used to check if the result of an arithmetic operation is negative and to branch to a specific label if it is.

 

o)   RPE: RPE stands for "Return on Parity Even" and is a conditional branching instruction that allows program flow to be controlled based on the parity flag. If the parity flag is set, the program will return to the instruction following the CALL or JUMP instruction. For example, RPE can be used to check if the result of an operation has an even number of set bits and to branch to a specific label if it does.

 

p)   RPO: RPO stands for "Return on Parity Odd" and is a conditional branching instruction that allows program flow to be controlled based on the parity flag. If the parity flag is not set, the program will return to the instruction following the CALL or JUMP instruction. For example, RPO can be used to check if the result of an operation has an odd number of set bits and to branch to a specific label if it does not.

 

5.    Stack Instructions:

 

a)    PUSH - The PUSH instruction is used to push the contents of a register pair onto the stack. For example, to push the contents of register pair BC onto the stack, we can use the instruction PUSH B.

 

b)   POP - The POP instruction is used to pop the top two bytes of the stack and store them in a register pair. For example, to pop the top two bytes of the stack and store them in register pair DE, we can use the instruction POP D.

 

 

6.    Input/Output Instructions:

 

a)    IN - The IN instruction is used to input data from an input port into a register. For example, to input data from input port 0x01 into register A, we can use the instruction IN A, 01h.

 

b)   OUT - The OUT instruction is used to output data from a register to an output port. For example, to output the contents of register A to output port 0x02, we can use the instruction OUT 02h, A.

7.    Machine Control Instructions:

 

a)    HLT - The HLT instruction is used to halt the processor. For example, to stop the processor, we can use the instruction HLT.

 

b)   NOP - The NOP instruction is used to provide a delay of one clock cycle. For example, to provide a delay of one clock cycle, we can use the instruction NOP.

 

c)    DI - The DI instruction is used to disable interrupts. For example, to disable interrupts, we can use the instruction DI.

 

d)   EI - The EI instruction is used to enable interrupts. For example, to enable interrupts, we can use the instruction EI.

 

 

Note: It's important to note that these instructions may have different functionalities and requirements depending on the specific 8085 microprocessor being used. It's important to refer to the specific processor's documentation for correct usage and functionality of each instruction.

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